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<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">Hmm, that is concerning – the various internet calculators show 0.54 or 0.89 amp for that width at 0.5 or 1 oz.. and max current when booting into Ubuntu is 1.8amp,
with steady state holding at 0.6~0.8amp or so. I did do those measurements on a Dual Ethernet Quad core, so it is likely a lot less for a dual core Atom. But probably not 50% less…<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">So poweron and boot surge exceed the current capacity of that trace on an unburdened board. Steady state idle should be ok.
<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">But it seems like hairy edge to me…
<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">|\/|ark.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">Mark van der Pol<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">Firmware Engineer,<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">Open Hardware Team,<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D;background:white">Open Source Technology Center</span><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"><o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D;background:white">Intel</span><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"><o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"><a href="mailto:Markx.van.der.pol@intel.com"><span style="color:#0563C1">Markx.van.der.pol@intel.com</span></a><o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">The MinnowBoard.org Foundation: a US-based non-profit providing education and promotion of the design and use of open-source software and hardware in embedded
computing on Intel® Architecture.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"><o:p> </o:p></span></p>
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<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><a name="_____replyseparator"></a><b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif">From:</span></b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif"> Alex Bakhtin [mailto:alex.bakhtin@gmail.com]
<br>
<b>Sent:</b> Thursday, April 12, 2018 2:55 PM<br>
<b>To:</b> Krau, Michael P <michael.p.krau@intel.com>; Van Der Pol, MarkX <markx.van.der.pol@intel.com><br>
<b>Cc:</b> MinnowBoard Community Email List <elinux-minnowboard@lists.elinux.org><br>
<b>Subject:</b> Re: [MinnowBoard] TurboT DualE board power by LSE header<o:p></o:p></span></p>
<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal" style="margin-bottom:12.0pt">Mark, Michael,<o:p></o:p></p>
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<p class="MsoNormal" style="margin-bottom:12.0pt"> Thank you for your reply. I agree that the trace width between LSE header and Q103 could be a problem. And actually it is. There is one place with trace width approx 0.68 mm. I don't really know if there
is 0.5 oz or 1 oz copper on L06. I think that this is ok for 1Amp on 0.5 oz because the rest of the trace width is about 1.4 mm.
<br>
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<img border="0" width="467" height="581" id="_x0000_i1025" src="cid:image001.png@01D3D284.7BB3E6E0" alt="изображение.png"><o:p></o:p></p>
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<p class="MsoNormal" style="margin-bottom:12.0pt">From this board we need CPU, 2xGigE, RAM. mSATA for booting and probably USB for a flash drive.
<br>
To test the reliability - I ran dual cpuburn (burnK6 x 2 for 2 cores) for about 8 hours - and everything was fine. Unfortunatelly we don't have a thermal imager to check the PCB temperature at this point.<br>
<br>
RIght now I'm not sure that this is a good idea to power this board by the LSE header. But I really don't have any other ideas.<o:p></o:p></p>
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<p class="MsoNormal" style="margin-bottom:12.0pt">Michael. Also today we accidentally applied the +12V on PS_5VSB on LSE header on one board:-( I'm pretty sure that U35 was failed. We'll replace it (spare NCT3012S would be delivered by our supplier at the end
of next week) and check - if this was the only failed part - we are lucky:-)<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">чт, 12 апр. 2018 г. в 22:31, Krau, Michael P <<a href="mailto:michael.p.krau@intel.com">michael.p.krau@intel.com</a>>:<o:p></o:p></p>
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<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><a name="m_-8148356398442039500__MailEndCompose"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">One historical piece of information: The Original
(non-Turbot) MinnowBoard MAX had a different implementation, where the LSE Header was not populate with the +PS_5VSB but with the (post regulator) 5VSB trace. This ties back to Mark’s trace comments, as the +P5_5VSB traces should be more robust than the
5VSB, as the 3 volt rail is drawn from the +PS_5VSB. In fact, I would doubt this solution would work on the non-Turbot MinnowBoard MAX, as the 3 volt rail would not be powered if the only source of power were 5 volts on the LSE.
</span></a><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"> </span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">During the board design, the 3 Amp rule was discussed, but I can’t remember if 3 Amps was the target
(meaning there should be some additional margin) or the upper limit (including the margin).
</span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"> </span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">I would like to think that the Turbot design change (5VSB to +PS_5VSB on the LSE) was done to accommodate
projects like yours, where the LSE can be used as an alternate power supply source for the platform. In which case they would have kept 3 AMPs as the standard… However, since the 5 volt rail does not go through the on board regulator, it also means that
the system is not protected by the 5 volt regulator. Accidentally putting 12 volts on the LSE 5volt pin could fry the board (instead of simply frying the regulator), and providing more amperage than the traces of the board can handle could have detrimental
impact on the board under high load. </span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"> </span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">The question that comes up is how much current does your application draw when fully operational?
If the draw is low enough, then it should be within the design rules applied. </span>
<o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"> </span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">The photo does look great!</span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"> </span><o:p></o:p></p>
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<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:18.0pt;font-family:"French Script MT";color:#1F497D">Michael Krau</span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"> </span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><i><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">While I am an Intel employee, I do not represent Intel and am not authorized to speak for Intel. </span></i><o:p></o:p></p>
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<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"> </span><o:p></o:p></p>
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<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><a name="m_-8148356398442039500______replyseparat"></a><b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif">From:</span></b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif">
elinux-MinnowBoard [mailto:<a href="mailto:elinux-minnowboard-bounces@lists.elinux.org" target="_blank">elinux-minnowboard-bounces@lists.elinux.org</a>]
<b>On Behalf Of </b>Van Der Pol, MarkX<br>
<b>Sent:</b> Thursday, April 12, 2018 11:23 AM<br>
<b>To:</b> <a href="mailto:alex.bakhtin@gmail.com" target="_blank">alex.bakhtin@gmail.com</a><br>
<b>Cc:</b> MinnowBoard Community Email List <<a href="mailto:elinux-minnowboard@lists.elinux.org" target="_blank">elinux-minnowboard@lists.elinux.org</a>></span><o:p></o:p></p>
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<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif"><br>
<b>Subject:</b> Re: [MinnowBoard] TurboT DualE board power by LSE header</span><o:p></o:p></p>
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<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"> <o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">It is under investigation – while the circuit works, there is a concern if the PCB traces from the
LSE header to the regulator are sized big enough to handle the current demands of the board and modules. It is supposed to be able to handle 3Amp, and I don’t know if that was actually implemented, and if that design rule was enforced into the board layout.
And I don’t know what safety margin exists on the design rule, if it was applied.</span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"> </span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">So – as you discovered, it works fine. And, until the analysis is done on the trace current capacity,
we don’t know if it is reliable. There is risk of it failing under load. </span>
<o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"> </span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">Thanks for sharing the update and photo! It looks great!</span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"> </span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">|\/|ark.</span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"> </span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">Mark van der Pol</span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">Firmware Engineer,</span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">Open Hardware Team,</span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D;background:white">Open Source Technology Center</span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D;background:white">Intel</span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"><a href="mailto:Markx.van.der.pol@intel.com" target="_blank"><span style="color:#0563C1">Markx.van.der.pol@intel.com</span></a></span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"> </span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">The MinnowBoard.org Foundation: a US-based non-profit providing education and promotion of the design
and use of open-source software and hardware in embedded computing on Intel® Architecture.</span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"> </span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"> </span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"> </span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif">From:</span></b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif"> elinux-MinnowBoard [<a href="mailto:elinux-minnowboard-bounces@lists.elinux.org" target="_blank">mailto:elinux-minnowboard-bounces@lists.elinux.org</a>]
<b>On Behalf Of </b>Alex Bakhtin<br>
<b>Sent:</b> Thursday, April 12, 2018 12:38 AM<br>
<b>To:</b> <a href="mailto:elinux-minnowboard@lists.elinux.org" target="_blank">elinux-minnowboard@lists.elinux.org</a><br>
<b>Subject:</b> Re: [MinnowBoard] TurboT DualE board power by LSE header</span><o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"> <o:p></o:p></p>
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<p class="MsoNormal" style="mso-margin-top-alt:auto;margin-bottom:12.0pt">Nobody sent a reply.<o:p></o:p></p>
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<p class="MsoNormal" style="mso-margin-top-alt:auto;margin-bottom:12.0pt">We made some testing and designed a simple PSU to check this idea. Everything is working fine.
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<o:p></o:p></p>
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<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto">вс, 1 апр. 2018 г. в 1:31, Alex Bakhtin <<a href="mailto:alex.bakhtin@gmail.com" target="_blank">alex.bakhtin@gmail.com</a>>:<o:p></o:p></p>
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<p class="MsoNormal" style="mso-margin-top-alt:auto;margin-bottom:12.0pt">Hello.<o:p></o:p></p>
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<p class="MsoNormal" style="mso-margin-top-alt:auto;margin-bottom:12.0pt"> Is it possible to power the TurboT Dual-Ethernet - Dual Core board from LSE header?<o:p></o:p></p>
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<p class="MsoNormal" style="mso-margin-top-alt:auto;margin-bottom:12.0pt"> Right not we are testing how TurboT fits out project. TurboT could be one of the core components, but the whole device should be dual-powered (220V AC and 10-36VDC). From my point
of view - this is a good idea to desing a PCB on which we would install our PSU, and also provide a mounting space for TurboT - holes and connection to the LSE header (I think we would also use one uart from LSE header).<o:p></o:p></p>
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<p class="MsoNormal" style="mso-margin-top-alt:auto;margin-bottom:12.0pt"> I checked the turbot schematics and I see that DC_IN_1 (power supply connector) is filtered by an LC filter, connected to protection curcuit and after that is connected to +PS_5VSB.<br>
+PS_5VSB is connected to pin 3 of LSE header and supply 5V power to the rest of the board. So, according to turbot schematics - we can supply +5V to the PS_5VSB directly and everything should be fine.
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<p class="MsoNormal" style="mso-margin-top-alt:auto;margin-bottom:12.0pt"> In the turbot gerber files I can see that this pin is connected to polygon on Layer 06, and it seems that this polygon is directly connected to Q103 and FB1->U13 (3V power supply).<o:p></o:p></p>
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<p class="MsoNormal" style="mso-margin-top-alt:auto;margin-bottom:12.0pt"> Is it ok to supply 5VDC it from LSE header? Thank you.<o:p></o:p></p>
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<p class="MsoNormal" style="mso-margin-top-alt:auto;margin-bottom:12.0pt">Alex Bakhtin<o:p></o:p></p>
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<p>Alex Bakhtin<o:p></o:p></p>
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<p>Alex Bakhtin<o:p></o:p></p>
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<p class="MsoNormal">-- <o:p></o:p></p>
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<p>Alex Bakhtin<o:p></o:p></p>
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