[MinnowBoard] Find GPIO Interrupt Line

[melvyn]

Bottom of Page 4526.

 

      “LPC Bridge has no interrupt to disable” do not think this is what we both need.

 

       (LPC is a group of GPIO pins used as a “low pin count buss”)

 

Try page 4572..

 

Good luck; 

Personally I am going to use a SPI I/O Expander chip to capture my 500nSec pulse.

 

If Intel read this why duplicate pages when the only difference between most GPIO Pins is the base addresses.

5308 pages at least 25% seem to duplicates.

NDA agreements! How do Intel expect us use these chips? We are not expecting design documentation, just programmers reference material. Design , it would be nice if we could read 8 or 16 bits with one instruction.  Something the Quark can do.

Legacy bridges, the legacy world was bytes or words, I/O as bits is new world.

 

 

From: elinux-MinnowBoard [mailto:elinux-minnowboard-bounces at lists.elinux.org] On Behalf Of czq
Sent: 07 October 2015 16:59
To: elinux-minnowboard at lists.elinux.org
Subject: [MinnowBoard] Find GPIO Interrupt Line

 

Hi there,

 

I'm reading Intel® AtomTM Processor E3800 Product Family Datasheet, trying to find out the interrupt line of GPIO.

Unlike most other PCI devices, which ususally have an interrupt register at 3c-3fh in its PCI configuration space, GPIO/LPC has a weird (at least to me) configuration space (page 4525)... I don't know how to find its interrupt line.

 

In the GPIO chapter, I can see it has memory mapped registers called Direct Interrupt Multiplexer. But I can't really understand the description. It also says that more details are available in VLV2_GPIO_configuration_primer presentation.

 

So does anyone know where I can find the VLV2_GPIO_configuration_primer presentation (I searched a lot but no luck...).

Or any thoughts and hints about how to find the interrupt line?

 

Thanks a lot!

Tom.

 

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