[MinnowBoard] SPI questions

Darren Hart dvhart at linux.intel.com
Wed Jan 28 05:21:52 UTC 2015


This changes the mechanism used to enumerate the hardware device to the
OS. Recent Linux kernels 3.16+ support for ACPI and PCI enumeration. ACPI
is supported since 3.14. Either should work for a board-file.

--
Darren


On 1/27/15, 3:13 PM, "Kevin Shelton" <kmshelton at gmail.com> wrote:

>sorry for the not clear writing: I meant to say ACPI mode for the
>"LPSS & SCC Devices Mode" setting
>
>On Tue, Jan 27, 2015 at 3:11 PM, Kevin Shelton <kmshelton at gmail.com>
>wrote:
>> I realized that in my BIOS settings, I was in ACPI mode.  Do I need to
>> be in PCI mode to use a board file?  What does that ACPI-PCI switch in
>> the BIOS do?  thanks for all the help
>>
>> On Mon, Jan 26, 2015 at 11:35 PM, Darren Hart <dvhart at linux.intel.com>
>>wrote:
>>> The SPI bus controlled by the pxa2xx driver is on the LPSS, which, yes,
>>> corresponds to the Low Power IO Controller in that block diagram.
>>>
>>> On 1/26/15, 10:38 PM, "Kevin Shelton" <kmshelton at gmail.com> wrote:
>>>
>>>>Thanks John and Darren.  I will play with spid_devtest and have
>>>>reached out to linux-spi at vger.kernel.org.
>>>>
>>>>A minnowmax-specific question: In the Baytrail block diagram at
>>>>http://media.bestofmicro.com/Y/3/400395/original/bay-trail-soc.jpg
>>>>does the Marvell pxa27x correspond to the "Low Power IO Controller"?
>>>>
>>>>On Mon, Jan 26, 2015 at 6:33 PM, Darren Hart <dvhart at linux.intel.com>
>>>>wrote:
>>>>> On 1/26/15, 5:52 PM, "John Hawley" <john.hawley at intel.com> wrote:
>>>>>
>>>>>>On 01/26/2015 05:47 PM, Kevin Shelton wrote:
>>>>>>>
>>>>>>>
>>>>>>> On Fri, Jan 23, 2015 at 2:41 PM, John Hawley <john.hawley at intel.com
>>>>>>> <mailto:john.hawley at intel.com>> wrote:
>>>>>>>
>>>>>>>     > I saw the thread 'Adding an SPI device to the Minnowboard'
>>>>>>>from
>>>>>>>late
>>>>>>>     > 2013 and 'SPI support on minnowboard v1' from Aug 2014.
>>>>>>>     >
>>>>>>>     > Darren Hart notes:
>>>>>>>     > Ultimately we want to do things like this without board
>>>>>>>files by
>>>>>>>using
>>>>>>>     > the _DSD mechanisms introduced by the ACPI 5.1 specification
>>>>>>>last
>>>>>>>week
>>>>>>>     >
>>>>>>>     > I just wanted to confirm the ACPI mechanism is not the
>>>>>>>recommended way
>>>>>>>     > yet, and that using low-speed-spidev.c as a template is still
>>>>>>>the
>>>>>>>way to go.
>>>>>>>
>>>>>>>     The answer to that will depend on what kernel you are
>>>>>>>intending to
>>>>>>>     target.  Kernel's with ACPI 5.1 _DSD support, I think you'd
>>>>>>>want
>>>>>>>to
>>>>>>>push
>>>>>>>     on that.  Older kernels without that, likely spidev or a more
>>>>>>>targeted
>>>>>>>     driver.
>>>>>>>
>>>>>>>
>>>>>>> Currently, I am targeting 3.17.  3.17 does not have ACPI 5.1 _DSD
>>>>>>> support, correct?
>>>>>>
>>>>>>Off the top of my head that came in in 3.18, so yes that's correct.
>>>>>
>>>>> 3.19 iirc.
>>>>>
>>>>> Also, using _DSD required a firmware change, or at least a DSDT
>>>>>update.
>>>>>
>>>>>>
>>>>>>>     > Additional q:
>>>>>>>     > How do you tell the SPI controller that you have an
>>>>>>>active-high
>>>>>>>instead
>>>>>>>     > of the usual active-low device?  Is it correct to do a
>>>>>>>bitwise
>>>>>>>or
>>>>>>>with
>>>>>>>     > SPI_CS_HIGH (0x4) with your SPI_MODE in your spi_board_info
>>>>>>>struct, like:
>>>>>>>     > .mode = SPI_MODE_0 | SPI_CS_HIGH
>>>>>>>
>>>>>>>     That should work, but take my statement with a grain of salt
>>>>>>>as I
>>>>>>>     haven't tried it with a device.
>>>>>>>
>>>>>>>
>>>>>>> It seems to have no effect that I can discern.  Pin 5 idles at 3.3V
>>>>>>> whether I have
>>>>>>>  .mode = SPI_MODE_3 | SPI_CS_HIGH
>>>>>>> -or-
>>>>>>> .mode = SPI_MODE_3
>>>>>>>
>>>>>>> I threw in a
>>>>>>> pr_info("SPI mode=%i\n", cod_spi_board_info.mode);
>>>>>>> to sanity check that I am setting the mode to what I think I am (3
>>>>>>>or
>>>>>>>7).
>>>>>>>
>>>>>>> Any debugging ideas?
>>>>>>> What is the best way to learn more about the SPI master?  It's
>>>>>>>built
>>>>>>> into the CPU, correct?
>>>>>>> This smells in the ballpark of
>>>>>>> relatedness:
>>>>>>>http://lists.infradead.org/pipermail/linux-arm-kernel/2014-June/2634
>>>>>>>67.
>>>>>>>ht
>>>>>>>ml
>>>>>>> I don't grok that patch, but I confirmed my version of pxa2xx.c in
>>>>>>>my
>>>>>>> 3.17 tree appears to contain that change.
>>>>>>
>>>>>>The SPI interface is indeed built into the CPU.  It's the pxa2xx
>>>>>>core,
>>>>>>which it looks like you've found.  I'd have to punt to someone else,
>>>>>>as
>>>>>>I'll admit, I don't know the SPI code well enough to say what's going
>>>>>>on.  I've CC'ed Darren Hart, he might know who to check with next.
>>>>>
>>>>> Those are some very specific SPI usage questions that I don't know
>>>>>the
>>>>> answer to off the top of my head. To find out, I would:
>>>>>
>>>>> 1) Search for other drivers in tree and externally that use
>>>>>active-high
>>>>>
>>>>> First hit looks interesting:
>>>>> https://www.kernel.org/doc/Documentation/spi/spidev_test.c
>>>>>
>>>>>
>>>>> 2) Lookup the right mailing lists for SPI Linux kernel development
>>>>>and
>>>>>ask
>>>>> the same question there
>>>>>
>>>>> --
>>>>> Darren Hart
>>>>> Intel Open Source Technology Center
>>>>>
>>>>>
>>>>>
>>>>> _______________________________________________
>>>>> elinux-MinnowBoard mailing list
>>>>> elinux-MinnowBoard at lists.elinux.org
>>>>> http://lists.elinux.org/mailman/listinfo/elinux-minnowboard
>>>>
>>>
>>>
>>> --
>>> Darren Hart
>>> Intel Open Source Technology Center
>>>
>>>
>>>
>


-- 
Darren Hart
Intel Open Source Technology Center





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