[MinnowBoard] DDR3L connection to SoC

[David Anders]

zero0d,

> On November 5, 2014 at 1:27 AM zero0d <dawid.wrtaric at hotmail.com> wrote:
> 
> 
> David Andreas,
> 
> Thanks for pointing me to the micron document , I will read it.
> 
> I have another question about the DDI1 port that is not used on minnowboard.
> You connected the DDI1_HPD to gnd (so says the Platform design guide) but
> the HPD is an active low signal and my guess to deactivate it should be
> connected to V1P8_S3 trough 10K or 100K?
> 

yes, it should be pulled high to disable. the baytrail series doesn't follow the
HDMI specification where the HPD signal should be active high, not low. if you
look at DDI0, we have a inverter inline to the HPD signal. since the DDI1 is
never activated in the firmware the the HPD signal is never read, so this pin is
never inspected.

Dave Anders






> Best regards.
> 
> 
> 
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