<div dir="ltr"><div><div><div><div>Hi,<br><br></div>This notes that the L2 cache is
shared and that changing the core frequency would impact the ARM CPU
performance. <br>However, I believe that the Pi 2 CPU has its own,
separate, L2 cache.<br></div>I dropped the "core_freq" setting as low as
possible (80Mhz) and found no measurable drop in CPU performance (for
my headless setup). <br><br></div>Perhaps the wording could be changed to say that this is a problem for the earlier ARMv6 Pi 1 (B, B+ etc) only.<br><br></div>Thanks<div class=""><div id=":rf" class="" tabindex="0"><img class="" src="https://ssl.gstatic.com/ui/v1/icons/mail/images/cleardot.gif"></div></div></div>