[MinnowBoard] Need to disable both UART on LSE?

[Markus Maier]

Lucas De Marchi <lucas.de.marchi at ...> writes:

> 
> On Sat, May 2, 2015 at 12:21 PM, Lucas De Marchi
> <lucas.de.marchi at ...> wrote:
> > On Fri, May 1, 2015 at 1:52 AM, Wei, David <david.wei at ...> wrote:
> >> From below error message, I assume you were trying to sue GPIO 74 on
GPIO controller INT33FC.
> >> Actually this GPIO does NOT connect to Pin12 of MinnowBoard Max Low
Speed Expander. It actually connects
> to pin 19 of MinnowBoard Max Low Speed Expander, which is shared by
GPIO_S0_SC[074] and SIO_UART2_RXD.
> >
> > this would be surprising because all I was doing was using the numbers
> > in Minnow Max wiki. And there the number 484 is the gpio number for
> > pin 12, which triggers this message.
> 
> And the wiki puts the number 484 on both pins 19 and 12 :-o
> 
> Assuming the numbers for kernel < 3.17 are correct, pin 12 should be
> 482, not 484. That explains why it worked on 3.14.
> 
> Testing it here.... and it works.  So, all that really needs fixing is the
wiki.
> 
> >> So that's why you have to disable UART2 to get this GPIO work.
> >>
> >> Pin 12 of LSE is connected to SIO_UART1_RTS# (or GPIO_S0_SC[072] ). It
is GPIO 72 of GPIO controller INT33FC.
> >
> > Also, in kernel 4.0 it's "working". The commit that makes it to work is:
> >
> > f8323b6 pinctrl: baytrail: Relax GPIO request rules
> 
> So it's more harming than helping here... although if the numbers were
> correct the warning should already be enough.
> 

Yes, I can confirm that. I just added a pull requrest for GPIO discovery
script in minnow-max-extras on GitHub and updated the wiki.