[MinnowBoard] GPIO pin mux state

[Darren Hart]

Thanks for the update Kevin. I saw your update to the bug and requested
that Mathias follow up.

On 2/6/15, 2:55 PM, "Kevin Shelton" <kmshelton at gmail.com> wrote:

>I was able to flip the mux state on physical pin 5 (the SPI SS line)
>with a call to writel in drivers/pinctrl/pinctrl-baytrail.c's
>byt_gpio_request
>
>That's likely not a safe thing to do, but with that, I was able to
>validate functionally of an SPI device that needed active-high SS.
>
>On Fri, Feb 6, 2015 at 7:59 AM, Kevin Shelton <kmshelton at gmail.com> wrote:
>> thanks, what about for a specific pin after boot?
>>
>> I am trying to change the mux state of just one of the SPI pins (so
>> disabling SPI LPSS Support from the LPSS & SCC configuration menu
>> doesn't accomplish what I'm after since it changes all of the SPI
>> pins).
>>
>> The end goal of what I'm trying to accomplish is to have the SS SPI
>> line inverted (more background in
>> https://bugzilla.yoctoproject.org/show_bug.cgi?id=7267)
>>
>> On Fri, Feb 6, 2015 at 2:00 AM, Holmberg, Hans
>><hans.holmberg at intel.com> wrote:
>>>
>>>>Anyone know how to set a GPIO pin mux state?
>>>
>>> Yep. It's a bit obscure, but you can enable GPIOs via the LPSS
>>>configuration in the BIOS:
>>>
>>> press F5 during boot
>>> go to System setup > South cluster configuration > LPSS & SCC
>>>configuration
>>> Scroll down and disable the function that is set as primary
>>>configuration for the PIN you wish to use as a GPIO.
>>>
>>> See http://elinux.org/Minnowboard:MinnowMax#Layout
>>> Example: disabling PWM1 will let you use PIN 22 as a GPIO.
>>>
>>> Best regards,
>>> Hans
>>> _______________________________________________
>>> elinux-MinnowBoard mailing list
>>> elinux-MinnowBoard at lists.elinux.org
>>> http://lists.elinux.org/mailman/listinfo/elinux-minnowboard
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-- 
Darren Hart
Intel Open Source Technology Center