[MinnowBoard] SPI questions

[John Hawley]

On 01/26/2015 05:47 PM, Kevin Shelton wrote:
> 
> 
> On Fri, Jan 23, 2015 at 2:41 PM, John Hawley <john.hawley at intel.com
> <mailto:john.hawley at intel.com>> wrote:
> 
>     > I saw the thread 'Adding an SPI device to the Minnowboard' from late
>     > 2013 and 'SPI support on minnowboard v1' from Aug 2014.
>     >
>     > Darren Hart notes:
>     > Ultimately we want to do things like this without board files by using
>     > the _DSD mechanisms introduced by the ACPI 5.1 specification last week
>     >
>     > I just wanted to confirm the ACPI mechanism is not the recommended way
>     > yet, and that using low-speed-spidev.c as a template is still the way to go.
> 
>     The answer to that will depend on what kernel you are intending to
>     target.  Kernel's with ACPI 5.1 _DSD support, I think you'd want to push
>     on that.  Older kernels without that, likely spidev or a more targeted
>     driver.
> 
> 
> Currently, I am targeting 3.17.  3.17 does not have ACPI 5.1 _DSD
> support, correct?

Off the top of my head that came in in 3.18, so yes that's correct.

>     > Additional q:
>     > How do you tell the SPI controller that you have an active-high instead
>     > of the usual active-low device?  Is it correct to do a bitwise or with
>     > SPI_CS_HIGH (0x4) with your SPI_MODE in your spi_board_info struct, like:
>     > .mode = SPI_MODE_0 | SPI_CS_HIGH
> 
>     That should work, but take my statement with a grain of salt as I
>     haven't tried it with a device.
> 
> 
> It seems to have no effect that I can discern.  Pin 5 idles at 3.3V
> whether I have
>  .mode = SPI_MODE_3 | SPI_CS_HIGH
> -or-
> .mode = SPI_MODE_3
> 
> I threw in a
> pr_info("SPI mode=%i\n", cod_spi_board_info.mode);
> to sanity check that I am setting the mode to what I think I am (3 or 7).
> 
> Any debugging ideas?
> What is the best way to learn more about the SPI master?  It's built
> into the CPU, correct?
> This smells in the ballpark of
> relatedness: http://lists.infradead.org/pipermail/linux-arm-kernel/2014-June/263467.html
> I don't grok that patch, but I confirmed my version of pxa2xx.c in my
> 3.17 tree appears to contain that change.

The SPI interface is indeed built into the CPU.  It's the pxa2xx core,
which it looks like you've found.  I'd have to punt to someone else, as
I'll admit, I don't know the SPI code well enough to say what's going
on.  I've CC'ed Darren Hart, he might know who to check with next.

- John 'Warthog9' Hawley